Texas Instruments (TI) has established itself as the leader in modern digital signal processors (DSPs) development, and their TMS320 family of processors is routinely used in power electronic systems. There are essentially six generations of evolution of the old 320 family as shown in this figure, and performance is indicated in the vertical direction. Recently, the 320 family has advanced even further, as discussed later. The modern DSP age practically started when TI introduced the 32010 in 1982. In the 320 family, C1x, C2x, and C5x are 16-bit fixed-point DSPs, whereas C3x, C4x, and C8x are 32-bit floating-point DSPs. The subclassification in each group is shown in the figure. C1x has a typical instruction cycle time of 160 ns, which reduces to 80 and 35 ns, respectively, for C2x
and C5x. In the floating-point DSPs, MFLOPS (million floating point operations per sec) are typically 33, 60, and 100, respectively, for C3x, C4x, and C80x. Both C4x and C8x are designed for multiprocessor applications to get high execution speed (C8x is often defined as an RISC processor). The fixed-point DSPs use a Harvard-type architecture that permits overlap of instruction fetch and execution of consecutive instruction for faster program execution, whereas 32-bit DSPs use a register-based CPU architecture with multiple bus sets to get the same objective. C30, C40, and C50 DSPs are discussed later. Note that none of these DSPs has an A/D converter on the chip.